Zyxell Prestige-650R-30: Difference between revisions
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==== The serial ==== | ==== The serial ==== | ||
=====without jp21 set===== | |||
Bootbase Version: V1.11 | 3/4/2003 10:26:13 | |||
RAM: Size = 8192 Kbytes | |||
DRAM POST: Testing: 8192K | |||
OK | |||
FLASH: AMD 16M *1 | |||
ZyNOS Version: V3.40(GT.5) | 3/16/2005 10:42:52 | |||
Press any key to enter debug mode within 3 seconds. | |||
............................................................ | |||
Copyright (c) 1994 - 2003 ZyXEL Communications Corp. | |||
initialize ch = 0, ethernet address: 00:a0:c5:71:26:ff | |||
Wan Channel init ........ done | |||
Loading ADSL modem F/W | |||
............................................................... done | |||
Press ENTER to continue... | |||
=====with jp21 set===== | =====with jp21 set===== | ||
Bootbase Version: V1.11 | 3/4/2003 10:26:13 | Bootbase Version: V1.11 | 3/4/2003 10:26:13 | ||
Revision as of 21:20, 4 April 2006
This is a wish project. These routers are thrown away and probably can get a second life.
a peek inside
ZYXEL Prestige 650
U1: ZyDAS (CPU) ZD2001 MFB4007.1 0309 WAVEPLUS TAIWAN
U2: MTC-20156TQ-C1 (PROBABLY SECOND CPU OR SOMETHING ELSE) C156-4AB ARM LAUBT0311 TAIWAN ST
J4: 1-VTREF? 2,4,6,8,10,12,14-GND 3-TRST (pin174) 5-TDI (pin1) 7-TMS (pin175) 9-TCK (pin171) 11-TDO(pin176) 13-VTREF?
U3: MTC20154TGC (ADSL CHIPSET) 1301533 7221F0309 MALTA ST
U4: ALTIMA (LAN CONTROLLER) AC101LKQT TN0310 P11 70850A
U5: MX SO31445 (FLASH ROM) 29LV160BTC-90 2H191700 TAIWAN 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
U6: WINBOND (DRAM MODULE 1) 3150G W986432DH-7
U7: WINBOND (DRAM MODULE 2) 311WH W981616BH-7
The serial
without jp21 set
Bootbase Version: V1.11 | 3/4/2003 10:26:13 RAM: Size = 8192 Kbytes DRAM POST: Testing: 8192K OK FLASH: AMD 16M *1 ZyNOS Version: V3.40(GT.5) | 3/16/2005 10:42:52 Press any key to enter debug mode within 3 seconds. ............................................................ Copyright (c) 1994 - 2003 ZyXEL Communications Corp. initialize ch = 0, ethernet address: 00:a0:c5:71:26:ff Wan Channel init ........ done Loading ADSL modem F/W ............................................................... done Press ENTER to continue...
with jp21 set
Bootbase Version: V1.11 | 3/4/2003 10:26:13 RAM: Size = 8192 Kbytes DRAM POST: Testing: 8192K OK FLASH: AMD 16M *1 ZyNOS Version: V3.40(GT.5) | 3/16/2005 10:42:52 Press ESC key to enter debug mode within 3 seconds. ............................................................ HTP: build at Mar 04 2003 17:38:20 Hardware Test Start... HTP: Phase 1 HTP: Phase 2 item = 0x04 UART Internal Loopback FAIL 0x01 HTP: Phase 3 HTP_Cmd>
HTP_Cmd>athe
======= HTP Command Listing =======
AT just answer OK
ATHE print help
ATSR system reboot
ATWBx,y write address x with 8-bit value y
ATWWx,y write address x with 16-bit value y
ATWLx,y write address x with 32-bit value y
ATRBx display the 8-bit value of address x
ATRWx display the 16-bit value of address x
ATRLx display the 32-bit value of address x
ATTIx,y test item x, parameter y (in hex)
ATESx,y send a ethernet frame, x=cnts, y=length
AT
item = 0x04 UART Internal Loopback
item = 0x05 LAN Internal Loopback
item = 0x06 ADSL CTRLE Interface
item = 0x08 SAR Internal Loopback
item = 0x09 UART External Loopback
item = 0x0A LAN External LoopbackEOx switch the statistic counting
ATED show receive cnts of Ethernet
ATASx,y send a AAL5 packet, x=cnts, y=length
ATAR display pico meteor's registers
ATAD display pico meteor's on chip sram
ATDUx,y dump memory contents from address x for length y
HTP_Cmd>OK